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XVME-530 8通道隔离模拟量输出模块 一款功能强大的D/A模块

XYCOM AO XVME-530 8通道隔离模拟量输出模块 XVME-530模拟量输出模块(以下简称AOUT)是一款功能强大的D/A模块,可产生8个12位分辨率的模拟信号。输出可以是电压或电流。以下输出电压范围可通过跳线选择:

0-5V,0至IOV,+2.5V,+5V,+IOV。跳线可选电流范围为4-20 mA。

8 个输出通道与数字逻辑进行光学隔离(300V)。


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XVME-530  8通道隔离模拟量输出模块  一款功能强大的D/A模块

XVME-530.jpg

型号:XVME-530

XVME-530 Xycom系列

XYCOM AO XVME-530 8通道隔离模拟量输出模块 XVME-530模拟量输出模块(以下简称AOUT)是一款功能强大的D/A模块,可产生8个12位分辨率的模拟信号。输出可以是电压或电流。以下输出电压范围可通过跳线选择:

0-5V,0至IOV,+2.5V,+5V,+IOV。跳线可选电流范围为4-20 mA。

8 个输出通道与数字逻辑进行光学隔离(300V)。


内核

为了标准化其XVME 1/0模块,XYCOM围绕模块之间通用的"内核"进行了设计。每种不同的模块类型都由一个标准内核组成,并结合了依赖于模块的应用电路。模块标准化可实现更高效的模块设计,并允许实施标准 1/0 架构。智能模块标准化的最大好处是它允许使用通用的命令语言或协议(在本例中为处理器间通信协议)。

智能内核基于 68000 微处理器。此设计为主/从提供了完整的 VMEbus 请求程序和中断程序选项

接口,以及 XYCOM 标准 1/0 架构的各个方面提供的所有优势(如本附录前面所述)。

XVME-530.jpg

Model: XVME-530

XVME-530 Xycom series

XYCOM AO XVME-530 8-channel isolated Analog Output Module XVME-530 Analog Output module (hereinafter referred to as AOUT) is A powerful D/A module that produces eight analog signals with 12-bit resolution. The output can be voltage or current. The following output voltage ranges can be selected by jumper:

0-5V, 0 to IOV, +2.5V, +5V, +IOV. Jumper optional current range is 4-20 mA.

Eight output channels are optically isolated from digital logic (300V).


Core

To standardize its XVME 1/0 module, XYCOM was designed around a common "kernel" between modules. Each of the different module types consists of a standard kernel combined with application circuitry that depends on the module. Module standardization enables more efficient module design and allows the implementation of standard 1/0 architectures. The biggest benefit of smart module standardization is that it allows the use of a common command language or protocol (in this case, inter-processor communication protocol).

The intelligent core is based on the 68000 microprocessor. This design provides a full range of VMEbus requester and interrupter options for master/slave

Interfaces, as well as all the benefits provided by various aspects of the XYCOM standard 1/0 architecture (as described earlier in this appendix).

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