型号:VMIVME4512
导言-VMIVME-4512模拟I/0板提供16个高质量模拟输出通道,可通过板上跳线进行编程,以在各种电压范围内工作。所有输出都具有12位分辨率,并且可以在10V下提供或吸收10 mA。对于离线测试,模拟输出可以从LO连接器断开。
除了输出功能,VMIVME-4512将接受16个差分或伪差分通道模拟输入。为了实现最大的系统吞吐量,模拟输入的数字化是在板上执行的多量程12位A/D转换器。转换器也可用于测试16路模拟量输出
VMIVME4512 ICC计数器电路由六个可编程系统时序控制器(STCS)组成。每个STC提供了四个高速计数器/波形合成接口的ICC,使VMIVME-254024通道的数字测量和控制。STC计数器可以单独配置,也可以最多四个一组配置,以实现各种测量和控制功能。板载68HC000 CPU直接配置和管理每个STC接口,使VMEbus主机接口提升到硬件级别之上。订购选项允许VMIVME-2540出厂时配置1,
2,4、或6个系统定时控制器。系统时序控制器的输入和输出在带有RS-422线路接收器和线路驱动器的前面板连接器上进行缓冲。通过将RS-422线路接收器的反相输入端通过前面板连接到板上1.4 V基准电压源,并将TTL信号连接到同相输入端,支持TTL输入信号兼容性。
VMIVME4512智能计数器/控制器的用户界面是由一个15 MHz的68HC000 CPU支持的EPROM固件,128K字节的零等待状态静态RAM和高度集成的控制和中断逻辑。VMEbus主机通过在本地内存中排队功能控制块并发出命令来对ICC进行编程。CPU通过解释功能控制块来响应命令,配置系统时序控制器,然后确认主机命令。一旦配置完成,CPU将在本地存储器中维护测量数据的数据结构,并在测量或控制过程完成时中断VME总线主机。
Model: VMIVME4512
Introduction - The VMIVME-4512 analog I/0 board offers 16 high-quality analog output channels that can be programmed via on-board jumpers to operate over a variety of voltage ranges. All outputs have 12-bit resolution and can deliver or absorb 10 mA at 10V. For offline testing, the analog output can be disconnected from the LO connector.
In addition to the output function, the VMIVME-4512 will accept 16 differential or pseudo-differential channel analog inputs. To achieve maximum system throughput, the digitization of the analog input is A multi-range 12-bit A/D converter performed on-board. The converter can also be used to test 16 analog outputs
The VMIVME4512 ICC counter circuit consists of six programmable system timing controllers (STCS). Each STC provides four high speed counter/waveform synthesis interfaces to the ICC, enabling digital measurement and control of the VMIVME-254024 channel. STC counters can be configured individually or in groups of up to four to enable a variety of measurement and control functions. The onboard 68HC000 CPU directly configters and manages each STC interface, elevating the VMEbus host interface above the hardware level. Ordering options allow the VMIVME-2540 to be factory configured with 1,
2,4, or 6 system timing controllers. The inputs and outputs of the system timing controller are buffered on a front panel connector with an RS-422 line receiver and line driver. TTL input signal compatibility is supported by connecting the inverting input of the RS-422 line receiver to the 1.4V reference voltage source on the board through the front panel and the TTL signal to the in-phase input.
The user interface of the VMIVME4512 intelligent counter/controller is EPROM firmware supported by a 15 MHz 68HC000 CPU, 128K bytes of zero wait state static RAM and highly integrated control and interrupt logic. The VMEbus host programs the ICC by queueing functional control blocks in local memory and issuing commands. The CPU responds to commands by interpreting functional control blocks, configuring the system timing controller, and then acknowledging host commands. Once configured, the CPU maintains the data structure of the measurement data in local memory and interrupts the VME bus host when the measurement or control process is complete.
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