TB852 3BSC950263R1 ABB 电源处理器模块

TB852 3BSC950263R1 ABB 电源处理器模块

TB852 3BSC950263R1 ABB 电源处理器模块是一种根据ARM Holdings PLC开发的模型设计的特定类型的计算机处理器。这种处理器设计被描述为精简指令集计算(RISC)设计，其中简化的中央处理单元(CPU)设计适应更高的性能。

虽然TB852 3BSC950263R1 ABB 电源处理器模块不是RISC设计的唯一例子，但在某些方面，它已经成为RISC模型的同义词。ARM处理器设计的一个例子是Raspberry Pi产品中内置的工程，这是一种适合用户口袋的RISC机器，使用256 MB随机存取存储器(RAM)。Raspberry Pi和类似机器背后的理念说明了ARM处理器如何用于构建更精简、更通用的硬件，与传统台式机或笔记本电脑背后更通用的设计形成对比。从基本意义上来说，并不是每个设备都需要内置于这些大型产品中的所有计算能力，ARM处理器和类似型号的出现恰逢向更小和更移动设备的过渡。

TB852 3BSC950263R1 ABB 电源处理器模块的软件设计根据硬件结构的总体划分，也可以分为两大部分来描述。整个系统的运行如图2所示，FPGA和DSP各自的程序独立运行，通过中断信号完成数据的实时交互。FPGA向DSP方向的指令是通过FPGA发送一个EDMA请求，DSP通过响应EDMA请求，建立EDMA通道，开始从FIFO中进行预处理后数据的读取，DSP向FPGA传输数据时，通过向FPGA发送一个中断信号，让其从FIFO中把压缩后的图像数据读出来。

TB852 3BSC950263R1 ABB 电源处理器模块

The TB852 3BSC950263R1 ABB Power processor module is a specific type of computer processor designed according to a model developed by ARM Holdings PLC. This processor design is described as a reduced instruction set computing (RISC) design, in which a simplified central processing unit (CPU) design ADAPTS for higher performance.

While the TB852 3BSC950263R1 ABB power processor module is not the only example of RISC design, in some ways it has become synonymous with the RISC model. An example of ARM processor design is the engineering built into the Raspberry Pi product, a pocket-fitting RISC machine that uses 256 MB of random access memory (RAM). The idea behind the Raspberry Pi and similar machines illustrates how ARM processors can be used to build leaner, more versatile hardware, in contrast to the more versatile designs behind traditional desktop or laptop computers. In a fundamental sense, not every device needs all the computing power built into these large products, and the advent of ARM processors and similar models coincides with the transition to smaller and more mobile devices.

TB852 3BSC950263R1 ABB power processor module software design according to the overall division of the hardware structure, can also be divided into two parts to describe. The operation of the whole system is shown in Figure 2. The programs of FPGA and DSP run independently and complete real-time data interaction through interrupt signals. The instruction from FPGA to DSP is to send an EDMA request through FPGA, and the DSP establishes an EDMA channel in response to the EDMA request and starts to read the pre-processed data from the FIFO. When the DSP transmits data to the FPGA, it sends an interrupt signal to the FPGA. Let it read the compressed image data out of the FIFO.

TB852 3BSC950263R1 ABB 电源处理器模块